Liquid crystal display device and electronic apparatus comprising it

ABSTRACT

A liquid crystal display device enabling realization of greater thinness, smaller area, and narrower frame and an electronic device using the same are provided. For this purpose, the liquid crystal display device of the present invention comprises a first substrate ( 16 ), a pixel unit ( 12 ) formed on the first substrate ( 16 ) and having pixels arranged in a matrix, a second substrate ( 62 ) arranged facing the first substrate ( 16 ), a liquid crystal composition ( 63 ) held between the first substrate ( 16 ) and the second substrate ( 62 ), and peripheral circuits formed on the first substrate ( 16 ) for writing pixel signals to the pixel unit ( 12 ), at least part of the peripheral circuits ( 13 ) of the above peripheral circuits being formed by thin film transistors on the first substrate ( 16 ), the remaining part of the peripheral circuits ( 23, 24, 25 ) of the above peripheral circuits being formed by semiconductor chips, and the semiconductor chips being arranged on the first substrate ( 16 ) so that at least part of the semiconductor chips overlap the regions of the peripheral circuits formed by the thin film transistors.

TECHNICAL FIELD

[0001] The present invention relates to a liquid crystal display deviceand an electronic device using the same, more particularly relates to aliquid crystal display device used for a portable electronic devicewhere greater thinness, smaller area, and a narrower frame are demandedand to an electronic device using the same as a display unit.

BACKGROUND ART

[0002] Thin, low power consuming panel displays have come to be used inlarge numbers as display devices for television receivers, computers,and portable terminals in recent years.

[0003] As such a panel display, there is known an active matrix typedisplay device comprised of a large number of pixels using for exampleTFTs (thin film transistors) as switching elements arranged in a matrixon a glass substrate or other transparent insulating substrate (panel)in combination with liquid crystals or other substances having anelectro-optic effect.

[0004] As such an active matrix type display device, Japanese UnexaminedPatent Publication (Kokai) No. 4-242724 provides a liquid crystaldisplay device forming part of the peripheral circuits formed on thesubstrate for driving the pixel unit by complementary TFTs similar tothe active elements connected to the pixels and forming the remainingperipheral circuits by semiconductor chips.

[0005]FIG. 1A is a schematic view of the configuration of a liquidcrystal display device as represented by the above Japanese UnexaminedPatent Publication (Kokai) No. 4-242724, while FIG. 1B is a sectionalview along the line A-A in FIG. 1A.

[0006] The liquid crystal display device shown in FIGS. 1A and 1B is aliquid crystal display device holding a liquid crystal layer 63 betweena transparent insulating substrate 16 formed with for example ahorizontal driver (HD) 14, vertical driver (VD) 13, and some otherperipheral circuits formed by TFTs and a transparent insulatingsubstrate arranged facing the same (counter substrate) 62, wherein theremaining peripheral circuits formed by semiconductor chips such as atiming controller (TC) 23, reference voltage generation circuit (REF)24, and DC-DC converter (DDC) 25, that is, IC chips 23 to 25, areattached to the surface of the transparent insulating substrate 16 onthe opposite side to the surface formed with the peripheral circuits 13and 14 and are electrically connected with the peripheral circuits 13and 14 by using a flexible cable 8.

[0007] Alternatively, as shown in FIG. 2, the remaining peripheralcircuits formed by semiconductor chips such as the timing controller(TC) 23, reference voltage generation circuit (REF) 24, and DC-DCconverter (DDC) 25, that is, the IC chips 23 to 25, are attached to thesame surface of the transparent insulating substrate 16 formed with thehorizontal driver (HD) 14, vertical driver (VD) 13, and some otherperipheral circuits formed by TFTs and are electrically connected withthe peripheral circuits 13 and 14.

[0008] In the liquid crystal display devices shown in FIGS. 1A and 1B,however, as shown in FIG. 1B, the thickness tb of the liquid crystaldisplay device as a whole ends up becoming greater by at least theextent of the thickness ta of the IC chips 23 to 25 and the flexiblecable 8, for example, by about 1 mm.

[0009] Therefore, the thickness of the device using the liquid crystaldisplay device as a display unit also ends up becoming greater. Inportable terminals, in particular mobile phones, effort is being made toreduce the thicknesses of the devices. If the thickness tb of the liquidcrystal display device used as the display unit of a mobile phone isgreat, this would obstruct the reduction of thickness of the mobilephone itself.

[0010] Further, in the liquid crystal display device shown in FIG. 2,the total area of the peripheral circuits formed by the TFTs and theremaining IC chips 23 to 25 becomes the area of the periphery (frame),so there is the disadvantage that compactness is impaired. Further,there is the disadvantage that the ratio of the effective display area(liquid crystal display unit) in the liquid crystal display device endsup becoming smaller.

DISCLOSURE OF INVENTION

[0011] An object of the present invention is to provide a liquid crystaldisplay device enabling the realization of a greater thinness, smallerarea, and narrower frame of the liquid crystal display device.

[0012] Another object of the present invention is to provide anelectronic device enabling the realization of a greater thinness,smaller area, and narrower frame overall by mounting such a liquidcrystal display device.

[0013] To achieve the above object, the liquid crystal display device ofthe present invention comprises a first substrate, a pixel unit formedon the first substrate and having pixels arranged in a matrix, a secondsubstrate arranged facing the first substrate, a liquid crystalcomposition held between the first substrate and the second substrate,and peripheral circuits formed on the first substrate for writing pixelsignals in the pixel unit, at least part of the peripheral circuits ofthe above peripheral circuits being formed by thin film transistors onthe first substrate, the remaining part of the peripheral circuits ofthe above peripheral circuits being formed by semiconductor chips, andthe semiconductor chips being arranged on the first substrate so that atleast part of the semiconductor chips overlap the regions of theperipheral circuits formed by the thin film transistors.

[0014] Further, to achieve the object, an electronic device of thepresent invention has a display unit for giving a desired display, anoperation unit, and a signal processing unit for causing the displayunit to give a desired display in accordance with the content ofoperations by the operation unit, wherein the display unit has a firstsubstrate, a pixel unit formed on the first substrate and having pixelsarranged in a matrix, a second substrate arranged facing the firstsubstrate, a liquid crystal composition held between the first substrateand the second substrate, and peripheral circuits formed on the firstsubstrate for writing pixel signals to the pixel unit, at least part ofthe peripheral circuits of the above peripheral circuits being formed bythin film transistors on the first substrate, the remaining part of theperipheral circuits of the above peripheral circuits being formed bysemiconductor chips, and the semiconductor chips being arranged on thefirst substrate so that at least part of the semiconductor chips overlapthe regions of the peripheral circuits formed by the thin filmtransistors.

BRIEF DESCRIPTION OF DRAWINGS

[0015]FIG. 1A is a schematic view of the configuration of a liquidcrystal display device of a first prior art, while FIG. 1B is asectional view along the line A-A of FIG. 1A.

[0016]FIG. 2 is a schematic view of the configuration of a liquidcrystal display device of a second prior art.

[0017]FIG. 3A is a schematic view of the configuration of circuits of aliquid crystal display device according to a first embodiment, whileFIG. 3B is a sectional view along the line B-B in FIG. 3A.

[0018]FIG. 4 is a schematic view of the electrical connections ofcircuits forming the liquid crystal display device according to thefirst embodiment.

[0019]FIG. 5A is a sectional view of a bottom gate structure polysiliconTFT, while FIG. 5B is a sectional view of a top gate structurepolysilicon TFT.

[0020]FIG. 6 is a block diagram of an example of the configuration of avertical driver in an active matrix type liquid crystal display deviceof an analog dot sequential driving system.

[0021]FIG. 7 is a block diagram of an example of the configuration of ahorizontal driver in an active matrix type liquid crystal display deviceof an analog dot sequential driving system.

[0022]FIG. 8A is a view for explaining a method of connection of acontrol unit formed by silicon ICs and a vertical driver formed bypolysilicon TFTs, while FIG. 8B is a sectional view of the connectionportion.

[0023]FIG. 9 is a schematic view of the layout of the circuits of theliquid crystal display device according to a second embodiment.

[0024]FIG. 10 is a schematic view of electrical connections of circuitsof the liquid crystal display device shown in FIG. 9.

[0025]FIG. 11 is a block diagram of an example of the configuration of ahorizontal driver in an active matrix type liquid crystal display deviceof a time-division driving system according to the second embodiment.

[0026]FIG. 12 is a circuit diagram of an example of the configuration ofa time-division switch unit.

[0027]FIG. 13 is a perspective view of the schematic configuration offor example a PDA as an electronic device to which the present inventionis applied.

BEST MODE FOR CARRYING OUT THE INVENTION

[0028] Preferred embodiments of the present invention will be explainednext referring to the attached drawings.

[0029] First Embodiment

[0030] The present embodiment shows the application of the presentinvention to an active matrix type liquid crystal display device of ananalog dot sequential driving system.

[0031]FIG. 3A is a schematic view of the configuration of the circuitsof a liquid crystal display device according to the present embodiment,while FIG. 3B is a sectional view along the line B-B in FIG. 3A.

[0032] Further, FIG. 4 is a schematic view of the electrical connectionsof the circuits forming the liquid crystal display device according tothe present embodiment.

[0033] As shown in FIG. 3A and FIG. 4, the active matrix type liquidcrystal display device according to the present embodiment has a liquidcrystal display unit 12 comprised of a large number of pixels 11arranged in a matrix, a vertical driver (VD) 13 for sequentiallyselecting the pixels 11 of the liquid crystal display unit 12 in rowunits, a horizontal driver (HD) 14 for writing pixel signals into thepixels 11 selected in row units, and a control unit 15 for controllingthe vertical and horizontal drivers 13 and 14 mounted on a transparentinsulating substrate 16.

[0034] In the liquid crystal display unit 12 on the transparentinsulating substrate 16, m rows worth of gate lines (vertical selectionlines) 17-1 to 17-m and n columns worth of signal lines (source lines)18-1 to 18-n are arranged in a matrix. Further, a liquid crystal layer63 is held with another transparent insulating substrate 62 arrangedfacing the substrate 16 across a predetermined distance. Pixels 11 arearranged at the intersections of the gate lines 17-1 to 17-m and thesignal lines 18-1 to 18-n.

[0035] Each of the pixels 11 is comprised of a polysilicon TFT (thinfilm transistor) 19 serving as a switching element having a gateelectrode connected to one of the gate lines 17-1 to 17-m and a sourceelectrode connected to one of the signal lines 18-1 to 18-n, a liquidcrystal cell (liquid crystal electrostatic capacity) 20 having a pixelelectrode connected to a drain electrode of the TFT 19, and auxiliaryelectrostatic capacity 21 having one electrode connected to a drainelectrode of the TFT 19.

[0036] In the above pixel structure, the counter electrode of the liquidcrystal cell 20 is connected to a common line 22 along with the otherelectrode of the auxiliary electrostatic capacity 21.

[0037] The common line 22 is given a predetermined DC voltage as acommon voltage VCOM.

[0038] The polysilicon TFTs which are used as the transistors used asswitching elements of the liquid crystal display unit 12 and thetransistors forming the vertical driver (VD) 13, horizontal driver (HD)14, and other drive units include ones of bottom gate structures wherethe gate electrodes are arranged under gate insulating films and ones oftop gate structures where the gate electrodes are arranged over the gateinsulating films.

[0039]FIG. 5A is a sectional view of a bottom gate structure polysiliconTFT, while FIG. 5B is a sectional view of a top gate structurepolysilicon TFT.

[0040] In the bottom gate structure TFT shown in FIG. 5A, a gateelectrode 42 is formed on the transparent insulating substrate (glasssubstrate) 16, a polysilicon (Poly-Si) layer 44 is formed over the gateelectrode 42 through a gate insulating film 43, and an interlayerinsulating film 45 is formed covering this polysilicon layer 44.

[0041] Further, a source region 46 and drain region 47 comprised of ann⁺diffusion layer are formed on the gate insulating film 43 at the sidesof the gate electrode 42, and a source electrode 48 and drain electrode49 comprised of aluminum interconnections are connected to these sourceand drain regions 46 and 47.

[0042] In the bottom gate structure TFT shown in FIG. 5B, a polysiliconlayer 52 is formed on a transparent insulating substrate (glasssubstrate) 16, a gate electrode 54 is formed on the polysilicon layer 52through a gate insulating film 53, and an interlayer insulating film 55is formed covering the gate electrode 54.

[0043] Further, a source region 56 and a drain region 57 comprised of ann⁺diffusion layer are formed on the transparent insulating substrate 16at the sides of the polysilicon layer 52, and a source electrode 58 anddrain electrode 59 comprised of aluminum interconnections are connectedto these source and drain regions 56 and 57.

[0044] In the control unit 15, the timing controller (TC) 23 receives asinput through a not shown TCP (tape carrier package) a power sourcevoltage VDD from a not shown external power source unit, digital imagedata DATA from a not shown external CPU, and a clock CLK from a notshown external clock generator.

[0045] The timing controller 23 controls the timing while supplying avertical start pulse VST, vertical clock VCK, and other clock signalsand various control signals to the vertical driver (VD) 13 and ahorizontal start pulse HST, a horizontal clock HCK, and other clocksignals and various control signals to the horizontal driver (HD) 14.

[0046] The reference voltage generation circuit (REF) 24 generates aplurality of reference voltages different in value and gives theseplurality of reference voltages as reference voltages to the latermentioned reference voltage selection type D/A converter 37 of thehorizontal driver (HD) 14.

[0047] The DC-DC converter (DDC) 25 converts the low level DC voltage(low voltage) to two or more high DC voltages (high voltages) and givesthem to the vertical driver (VD) 13, horizontal driver (HD) 14,reference voltage generation circuit 24, and other circuits.

[0048] In the present embodiment, as circuit parts driven at a highspeed or circuit parts with small variance in characteristics, forexample, the timing controller 23, reference voltage generation circuit24, and DC-DC converter 25 of the control unit 15 are formed by singlecrystal silicon chips (ICs).

[0049] Further, the silicon ICs 23 to 25, as shown in FIG. 3B, aremounted on the vertical driver (VD) 13 by for example a COG (chip onglass) method.

[0050] The silicon ICs 23 to 25 formed by single crystal silicon can bedriven even by 100 MHz.

[0051] On the other hand, as circuit parts driven at a low speed andwith large variance in characteristics, for example, the vertical driver(VD) 13 and horizontal driver (HD) 14 are formed using polysilicon TFTsas explained above.

[0052] The vertical driver (VD) 13, for example, as shown in FIG. 6, hasa shift register 31, a level shifter 32, and a gate buffer 33.

[0053] When input with the vertical start pulse VST, the shift register31 sequentially transfers the vertical start pulse VST synchronized withthe vertical clock VCK and sequentially outputs shift pulses from thetransfer stages.

[0054] The level shifter 32 boosts the shift pulses output from thetransfer stages of the shift register 31 and supplies them to the gatebuffer 33.

[0055] The gate buffer 33 sequentially applies the shift pulses boostedat the level shifter 32 to the gate lines 17-1 to 17-m of the liquidcrystal display unit 12 as vertical scanning pulses and selectivelydrives the pixels 11 of the liquid crystal display unit 12 in row unitsfor vertical scanning.

[0056] The horizontal driver (HD) 14, for example, as shown in FIG. 7,has a shift register 34, a level shifter 35, a data latch circuit 36, aD/A converter 37, and a buffer 38.

[0057] When input with the horizontal start pulse HST, the shiftregister 34 sequentially transfers the horizontal start pulse HSTsynchronized with the horizontal clock HCK and sequentially outputsshift pulses from the transfer stages to perform horizontal scanning.

[0058] The level shifter 35 boosts the shift pulses output from thetransfer stages of the shift register 34 and supplies them to the datalatch circuit 36.

[0059] The data latch circuit 36 responds to the shift pulses given fromthe shift register 34 through the level shifter 35 and sequentiallylatches predetermined bits of the digital image data DATA input.

[0060] The D/A converter 37 is for example configured as a referencevoltage selection type which converts the digital image data latched atthe data latch circuit 36 to analog image signals which it then gives tothe signal lines 18-1 to 18-n of the liquid crystal display unit 12through the buffer 38.

[0061]FIG. 8A is a view for explaining a method of connection of thecontrol unit 15 formed by the silicon ICs 23 to 25 and the verticaldriver (VD) 13 formed by polysilicon TFTs. Further, FIG. 8B is asectional view of the connection portion.

[0062] As shown in FIG. 8A, to enable arrangement of the silicon ICs 23to 25, the vertical driver (VD) 13 is formed with drive circuit areas 13a. Each drive circuit area 13 a is configured connected to a pluralityof pads 13 b.

[0063] On the other hand, the silicon ICs 23 to 25, as shown in FIG. 8A,are formed with control circuit areas 251 on the silicon substrate 250.These control circuit areas 251 are configured electrically connected tobumps 252 through a plurality of not shown pads. Note that in FIG. 8A,the control circuit areas 251 and the bumps 252 are formed on thereverse side of the paper.

[0064] Further, as shown in FIG. 8B, the drive circuit areas 13 a of thevertical driver (VD) 13 and the control circuit areas 251 of the siliconICs 23 to 25 are made to face each other. By mounting the bumps of thesilicon ICs 23 to 25 on the pads 13 b of the vertical driver (VD) 13through a conductive particle material 66, electrical connection betweenthe control circuits and the drive circuits is achieved.

[0065] Further the pads 13 b are connected to not shown aluminuminterconnections provided on the transparent insulating substrate 16.These aluminum interconnections are used for electrical connectionbetween the IC chips 23 to 25 shown in FIG. 4 and electrical connectionbetween the IC chips 23 to 25 and the horizontal and vertical drivers 13and 14.

[0066] Note that FIG. 8B shows an example where the drive circuit area13 a is formed by complementary TFTs. Accordingly, a drain region 47comprised of an n⁺ diffusion layer of one TFT and a source region (drainregion) 46a comprised of a p⁺ diffusion region of another TFT areelectrically connected by for example an aluminum interconnection 60.Further, a passivation film 61 is formed covering the complementary typeTFT.

[0067] The operation of the liquid crystal display device of the aboveconfiguration will be explained next.

[0068] For example, image data DATA is input from an external CPU to thetiming controller 23, whereby that image data DATA is supplied to thedata latch circuit 36 of the horizontal driver (HD) 14.

[0069] Further, the reference voltage generation circuit 24 generates aplurality of reference voltages for use in the D/A converter 37 of thehorizontal driver (HD) 14 and supplies them to not shown referencevoltage lines of the D/A converter 37.

[0070] Next, a horizontal clock HCK and horizontal start pulse HST areinput to the shift register 34 of the horizontal driver (HD) 14.

[0071] When input with the horizontal start pulse HST, the shiftregister 34 sequentially transfers the horizontal start pulse HSTsynchronized with the horizontal clock and sequentially outputs shiftpulses from the transfer stages to the level shifter 35.

[0072] The level shifter 35 boosts the shift pulses output from thetransfer stages of the shift register and supplies them to the datalatch circuit 36.

[0073] The data latch circuit 36 responds to the shift pulses given fromthe shift register 34 through the level shifter 35 and sequentiallylatches predetermined bits of the digital image data DATA input from thetiming controller 23.

[0074] The image data latched at the data latch circuit 36 is suppliedto a reference voltage selection type D/A converter 37.

[0075] The D/A converter 37 selects the corresponding reference voltage,converts the digital image data to analog image signals, and suppliesthem as analog signals to the signal lines 18-1 to 18-n of the liquidcrystal display unit 12 through the buffer 38.

[0076] When input with the vertical start pulse VST, the vertical driver(VD) 13 sequentially transfers the vertical start pulse VST synchronizedwith the vertical clock VCK and sequentially outputs shift pulses fromthe transfer stages to the level shifter 32.

[0077] Next, the level shifter 32 boosts the shift pulses output fromthe transfer stages of the shift register 31 and supplies them to thegate buffer 33.

[0078] The gate buffer 33 sequentially applies the shift pulses boostedat the level shifter 32 to the gate lines 17-1 to 17-m as verticalscanning pulses and selectively drives the pixels 11 of the liquidcrystal display unit 12 in row units.

[0079] Due to this, the image data is written in parallel to the nnumber of pixels.

[0080] According to the liquid crystal display device according to thepresent embodiment, as circuit parts driven at a low speed and withlarge variance in characteristics, for example, the vertical driver (VD)13 and horizontal driver (HD) 14 are formed using polysilicon TFTs,while as circuit parts driven at a high speed or circuit parts withsmall variance in characteristics, for example, the timing controller23, reference voltage generation circuit 24, and DC-DC converter 25 ofthe control unit 15 are formed by single crystal silicon chips (ICs).Further, the circuit parts formed by ICs are mounted on the verticaldriver (VD) 13 or other drive circuit parts by for example the COGmethod. Due to this, it is possible to reduce the frame portion of theliquid crystal display device.

[0081] Further, as shown in FIG. 3B, by making the total thickness tl ofthe vertical driver (VD) 13 and the IC chips 23 to 25 less than thetotal thickness t3 of the facing transparent insulating substrate 62 andliquid crystal layer 63, the thickness t2 of the liquid crystal displaydevice as a whole is no longer dependent on the thickness of the ICchips 23 to 25, so the liquid crystal display device can be madethinner.

[0082] That is, the total thickness t2 of the transparent insulatingsubstrate 16, the transparent insulating substrate 62, and the liquidcrystal layer 63 becomes the thickness of the liquid crystal displaydevice.

[0083] Further, by making the peripheral circuits by ICs and mountingthe IC chips on the transparent insulating substrate 16, it is possibleto reduce the locations for electrical connection with outside circuitson the transparent insulating substrate 16, so it is possible to improvethe reliability against mechanical vibration of the liquid crystaldisplay device and possible to suppress the occurrence of defectiveelectrical connections in the manufacturing process.

[0084] Note that when mounting the IC chips 23 to 25 on the transparentinsulating substrate 16, a protective layer is formed on the silicon ICsat the time of fabrication, so there is no problem in reliability.

[0085] Second Embodiment

[0086] The present embodiment shows application of the present inventionto an active matrix type liquid crystal display device of atime-division driving system (selector system).

[0087]FIG. 9 is a schematic view of the layout of the circuits of anactive matrix type liquid crystal display device of the time-divisiondriving system to which the present invention is applied.

[0088]FIG. 10 is a schematic view of electrical connections of circuitsof the liquid crystal display device shown in FIG. 9.

[0089] In FIG. 9 and FIG. 10, the liquid crystal display deviceaccording to the present embodiment is comprised of a liquid crystaldisplay unit 12 comprised of a large number of pixels 11 arranged in amatrix, a vertical driver (VD) 13 for sequentially selecting the pixels11 of the liquid crystal display unit 12 in row units, a horizontaldriver (HD) 74 for writing pixel signals into the pixels 11 selected inrow units, a time-division switch unit (SW) 75 for time-divisiondriving, and a control unit 15 for controlling the vertical andhorizontal drivers 13 and 74 and the time-division switch unit (SW) 75mounted on a transparent insulating substrate 16.

[0090] Each of the pixels 11 is comprised of a polysilicon TFT 19 havinga gate electrode connected to one of the gate lines 17-1 to 17-m and asource electrode connected to one of the signal lines 18-1 to 18-n, aliquid crystal cell 20 having a pixel electrode connected to a drainelectrode of the TFT 19, and auxiliary electrostatic capacity 21 havingone electrode connected to a drain electrode of the TFT 19.

[0091] In each of the pixels 11 of the above configuration, the counterelectrode of the liquid crystal cell 20 is connected to a common line 22along with the other electrode of the auxiliary electrostatic capacity21. The common line 22 is given a predetermined DC voltage as a commonvoltage VCOM.

[0092] The control unit 15 for controlling the vertical driver (VD) 13,the horizontal driver (HD) 74, and the time-division switch unit (SW) 75has a timing controller (TC) 23, reference voltage generation circuit(REF) 24, DC-DC converter (DDC) 25, etc.

[0093] The timing controller 23 receives as input through a not shownTCP (tape carrier package) a power source voltage VDD from a not shownexternal power source unit, digital image data DATA from a not shownexternal CPU, and a clock CLK from a not shown external clock generator.

[0094] The timing controller 23 controls the timing while supplying avertical start pulse VST, vertical clock VCK, and other clock signalsand various control signals to the vertical driver (VD), a horizontalstart pulse HST, a horizontal clock HCK, and other clock signals andvarious control signals to the horizontal driver (HD) 74, and gateselection signals S1 to S3 and XS1 to XS3 to the time-division switchunit (SW) 75.

[0095] The reference voltage generation circuit 24 generates a pluralityof reference voltages different in value and gives these plurality ofreference voltages as reference voltages to the later mentionedreference voltage selection type D/A converter 88 of the horizontaldriver (HD) 74.

[0096] The DC-DC converter 25 converts the low level DC voltage (lowvoltage) to two or more high DC voltages (high voltages) and gives themto the vertical driver (VD) 13, horizontal driver (HD) 74, referencevoltage generation circuit 24, and other circuits.

[0097] In the active matrix type liquid crystal display device of thetime-division driving system of the above configuration, the transistorsforming the vertical driver (VD) 13 and the analog switches forming thetime division switch unit (SW) are formed on a transparent insulatingsubstrate 16 the same as that of the liquid crystal display unit 12 byTFTs, in particular polysilicon TFTs the same as the transistors of theswitching elements of the liquid crystal display unit 12.

[0098] On the other hand, the horizontal driver (HD) 74 and the timingcontroller 23, reference voltage generation circuit 24, and DC-DCconverter 25 of the control unit 15 are formed by single crystal siliconICs.

[0099] Further, the horizontal driver (HD) 74 formed by the silicon ICis mounted on the time-division selection switch unit 75, while thereference voltage generation circuit 24 and DC-DC converter 25 formed bysilicon ICs are mounted on the vertical driver (VD) 13—all by forexample the COG method.

[0100] Here, the time-division driving method will be explained togetherwith the operation of the liquid crystal display of the presentembodiment.

[0101] The “time-division driving method” is a method of driving bydividing the signal lines in a liquid crystal display unit 12 into units(blocks) of pluralities of adjoining lines and outputting signalvoltages given to the plurality of signal lines in each block from theoutput terminals of the horizontal driver (HD) 74 in time series, whileproviding a time-division switch unit (SW) 75 dealing with units ofpluralities of signal lines and using that time-division switch unit(SW) 75 to sample the time series signal voltages output from thehorizontal driver (HD) 74 and sequentially give them to the plurality ofsignal lines.

[0102] To realize this time-division driving method, the horizontaldriver (HD) 74 is configured to deal with units of pluralities of signallines and output the signal voltages given to a plurality of signallines in time series.

[0103]FIG. 11 shows an example of the configuration of the abovehorizontal driver 74.

[0104] The horizontal driver (HD) 74 shown in FIG. 11 has a shiftregister 84, a sampling switch group 85, a level shifter 86, a datalatch circuit 87, and a D/A converter 88. In this embodiment, forexample, it is configured to fetch the 5 bits of digital image dataDATA1 to DATA5 and the power source voltages Vdd and Vss from the twosides of the shift register 84 in the shift direction.

[0105] In the horizontal driver (HD) 74 of the above configuration, wheninput with the horizontal start pulse HST, the shift register 84sequentially transfers the horizontal start pulse HST in synchronizationwith the horizontal clock HCK so as to sequentially output shift pulsesfrom the transfer stages and perform horizontal scanning.

[0106] The sampling switches in the sampling switch group 85 respond tothe shift pulses (sampling pulses) sequentially output from the shiftregister 84 to sequentially sample the input digital image data DATA1 toDATA5.

[0107] The level shifter 86 boosts the for example 5V digital datasampled by the sampling switch group 85 to the digital data of theliquid crystal drive voltage.

[0108] The data latch circuit 87 is a memory for storing 1H worth of thedigital data boosted by the level shifter 86.

[0109] The D/A converter 88 is for example configured as a referencevoltage selection type and outputs the 1H worth of digital image dataoutput from the data latch circuit 87 converted to analog image signals.

[0110] Further, as the horizontal driver (HD) 74, one of a so-calledcolumn inversion driving system is used.

[0111] The horizontal driver (HD) 74 realizes column inversion drivingby outputting a signal voltage inverted in potential for each odd numberand even number output terminal and inverting the polarity of the signalvoltage for every field. Here, the “column inversion driving system” isa driving system where pixels adjoining each other in the horizontaldirection have the same polarity and the states of the pixel polaritiesare inverted for every field.

[0112] On the other hand, the time-division switch unit (SW) 75 isconfigured by analog switches (transmission switches) for sampling thetime series signal voltages output from the horizontal driver (HD) 74 bya time-division method.

[0113]FIG. 12 shows an example of the configuration of a time-divisionswitch unit (SW) 75.

[0114] One of the time-division switch units (SW) shown in FIG. 12 isprovided for each output of the horizontal driver (HD) 74. Further,here, the case of three-way time-division driving for R (red), G(green), and B (blue) is shown as an example.

[0115] The time-division switch unit (SW) 75 is comprised of analogswitches 75-1, 75-2, and 75-3 of a CMOS configuration where a p-channelMOS transistor and an n-channel MOS transistor are connected inparallel.

[0116] Note that in the present embodiment, CMOS configuration switcheswere used as the analog switches 75-1, 75-2, and 75-3, but it is alsopossible to use p-channel MOS transistors or n-channel MOS transistors.

[0117] In the time-division switch unit (SW) 75, the input ends of thethree analog switches 75-1, 75-2, and 75-3 are connected in common whilethe output ends are connected to ends of the three signal lines 18-1,18-2, and 18-3.

[0118] Further, the input ends of the analog switches 75-1, 75-2, and75-3 are given signal potentials output in time series from thehorizontal driver (HD) 74.

[0119] Further, a total of six control lines 89-1 to 89-6, or two foreach analog switch, are arranged. Further, two control input ends of theanalog switches 75-1, that is, the gates of the CMOS transistors, areconnected to the control lines 89-1 and 89-2, two control input ends ofthe analog switches 75-2 are connected to the control lines 89-3 and89-4, and two control input ends of the analog switch 75-3 are connectedto the control lines 895 and 89-6.

[0120] The six control lines 89-1 to 89-6 are given gate selectionsignals Si to S3 and XS1 to XS3 for sequentially selecting the threeanalog switches 75-1, 75-2, and 75-4 from the timing controller (TC) 23(see FIG. 10). Here, the gate selection signals XS1 to XS3 are invertedsignals of the gate selection signals S1 to S3.

[0121] The gate selection signals S1 to S3 and XS1 to XS3 sequentiallyturn on the three analog switches 75-1, 75-2, and 75-3 insynchronization with the time series signal potential output from thehorizontal driver (HD) 74.

[0122] Due to this, the analog switches 75-1, 75-2, and 75-3 supply thetime series signal potentials output from the horizontal driver (HD) 74to the corresponding signal lines 18-1, 18-2, and 18-3 while samplingthem by threeway time-division in a 1H period.

[0123] In the liquid crystal display device according to the presentembodiment, as circuit parts driven at a low speed and with largevariance in characteristics, for example, the vertical driver (VD) 13and time-division switch unit (SW) 75 are formed using polysilicon TFTs,while as circuit parts driven at a high speed or circuit parts withsmall variance in characteristics, for example, the horizontal driver(HD) 74 and the timing controller 23, reference voltage generationcircuit 24, and DC-DC converter 25 of the control unit 15 are formed bysingle crystal silicon chips (ICs). Further, the circuit parts formed byICs are mounted on the vertical driver (VD) 13 or the time-divisionswitch unit (SW) 75 by for example the COG method. Due to this, it ispossible to obtain similar effects as in the first embodiment.

[0124] Third Embodiment

[0125] The liquid crystal display devices according to the above firstand second embodiments are suitable not only for use as display units ofpersonal computers, word processors, and other office automationequipment or television receivers etc., but also particularly for use asdisplay units of portable electronic devices such as mobile phones andPDAs (personal digital assistants), which are being made thinner andthinner.

[0126]FIG. 13 is a perspective view of the schematic configuration offor example a PDA as an electronic device mounting a liquid crystaldisplay device according to the first and second embodiments.

[0127] The PDA according to this example is configured with a displayunit 92, a speaker unit 93, an operation unit 94, and a power sourceunit 95 arranged at the front surface of the device housing 91.

[0128] Note that input to the PDA shown in FIG. 13 is possible by a pen96 etc. on the display unit 92.

[0129] While not shown, the device housing 91 houses inside it a signalprocessing unit for performing desired signal processing to make thedisplay unit 92 exhibit a desired display in accordance with the contentof the operations and input by the operation unit 94 and pen 96 etc.

[0130] The display unit 92 of the PDA of this configuration uses aliquid crystal display device according to the first embodiment orsecond embodiment.

[0131] By using a liquid crystal display device of the present inventionas the display unit 92 in a PDA, mobile phone, or other electronicdevice in this way, since the liquid crystal display device isconfigured to be made thinner and narrower in frame, there is theadvantage that it can contribute greatly to the increased thinness andnarrower frame of the housing of a portable electronic device such as amobile phone.

[0132] The present invention is not limited to the explanation of theabove embodiments.

[0133] For example, in the present embodiment, the CPU, memory storingthe image data, and clock generator were provided outside of the liquidcrystal display unit, but it is also possible to mount one or more ofthese on the liquid crystal display unit as part of the control unit.

[0134] Further, in the present embodiment, the example was shown ofmounting the ICs of the control unit on the vertical driver by the COGmethod, but the invention is not limited to this. For example, mountingby the TAB (tape automated bonding) method etc. or mounting on thehorizontal driver are also possible.

[0135] Various other modifications are possible within the scope of thegist of the present invention.

Industrial Applicability

[0136] The present invention can be applied to a liquid crystal panel orother display device or to an electronic device provided with such aliquid crystal panel. Due to this, it is possible to realize a greaterthinness, smaller area, and narrower frame of the display device and inturn the greater thinness, smaller area, and narrower frame of theelectronic device using this as a display unit.

Explanation of Reference Numerals

[0137]11 . . . pixel

[0138]12 . . . liquid crystal display unit (pixel unit)

[0139]13 . . . vertical driver

[0140]14, 74 . . . horizontal driver

[0141]15 . . . control unit

[0142]16 . . . transparent insulating substrate

[0143]19 . . . polysilicon TFT

[0144]20 . . . liquid crystal cell

[0145]23 . . . timing controller

[0146]24 . . . reference voltage generation circuit

[0147]25 . . . DC-DC converter

[0148]62 . . . transparent insulating substrate

[0149]63 . . . liquid crystal layer

1. A liquid crystal display device comprising a first substrate (16), apixel unit (12) formed on the first substrate (16) and having pixelsarranged in a matrix, a second substrate (62) arranged facing the firstsubstrate (16), a liquid crystal composition (63) held between the firstsubstrate (16) and the second substrate (62), and peripheral circuitsformed on the first substrate (16) for writing pixel signals in thepixel unit (12), at least part of the peripheral circuits (13) of theabove peripheral circuits being formed by thin film transistors on thefirst substrate (16), the remaining part of the peripheral circuits (23,24, 25) of the above peripheral circuits being formed by semiconductorchips, and the semiconductor chips being arranged on the first substrate(16) so that at least part of the semiconductor chips overlap theregions of the peripheral circuits formed by the thin film transistors.2. A liquid crystal display device as set forth in claim 1, wherein saidperipheral circuits formed by thin film transistors include a verticaldriver (13) for sequentially selecting pixels of said pixel unit in rowunits and a horizontal driver (14) for writing pixel signals in thepixels selected in row units by the vertical driver.
 3. A liquid crystaldisplay device as set forth in claim 1, wherein said peripheral circuitsformed by thin film transistors include a vertical driver (13) forsequentially selecting pixels of said pixel unit in row units and saidperipheral circuits formed by semiconductor chips include a horizontaldriver (74) for writing pixel signals in the pixels selected in rowunits by the vertical driver.
 4. A liquid crystal display device as setforth in claim 2 or 3, wherein said peripheral circuits formed bysemiconductor chips include a timing controller (23) for controlling thetiming of selection of the pixels by the vertical driver (13) and thetiming for writing of the pixel signals to the pixels by the horizontaldriver.
 5. A liquid crystal display device as set forth in any one ofclaims 2 to 4, wherein said peripheral circuits formed by semiconductorchips include a reference voltage generator (24) for outputting areference voltage to said horizontal driver.
 6. A liquid crystal displaydevice as set forth in any one of claims 2 to 5, wherein said peripheralcircuits formed by semiconductor chips include a DC-DC converter (25)for generating at least two types of voltages higher than an inputvoltage and giving power to at least the vertical driver and thehorizontal driver.
 7. A liquid crystal display device as set forth inany one of claims 1 to 6, wherein the semiconductor chips are mounted onthe first substrate by a COG method so that at least part of thesemiconductor chips overlap regions of said peripheral circuits formedby thin film transistors.
 8. A liquid crystal display device as setforth in claim 7, wherein connection parts for connecting thesemiconductor chips by the COG method are formed at peripheral parts ofsaid peripheral circuits formed by thin film transistors.
 9. A liquidcrystal display device as set forth in any one of claims 1 to 8, whereinas said peripheral circuits, the part of the peripheral circuits drivenat a low speed are formed by thin film transistors, while the peripheralcircuits driven at a higher speed than that part of the peripheralcircuits are formed by semiconductor chips.
 10. A liquid crystal displaydevice as set forth in any one of claims 1 to 9, wherein a thickness ofthe semiconductor chips is smaller than a combined thickness of saidliquid crystal composition on said first substrate and said secondsubstrate.
 11. An electronic device having a display unit for giving adesired display, an operation unit, and a signal processing unit forcausing said display unit to give a desired display in accordance withthe content of the operations by the operation unit, wherein the displayunit comprises a first substrate (16), a pixel unit (12) formed on thefirst substrate (16) and having pixels arranged in a matrix, a secondsubstrate (62) arranged facing the first substrate (16), a liquidcrystal composition (63) held between the first substrate (16) and thesecond substrate (62), and peripheral circuits formed on the firstsubstrate (16) for writing pixel signals to the pixel unit (12), atleast part of the peripheral circuits (13) of the above peripheralcircuits being formed by thin film transistors on the first substrate(16), the remaining part of the peripheral circuits (23, 24, 25) of theabove peripheral circuits being formed by semiconductor chips, and thesemiconductor chips being arranged on the first substrate (16) so thatat least part of the semiconductor chips overlap the regions of theperipheral circuits formed by the thin film transistors.
 12. Anelectronic device as set forth in claim 11, wherein said peripheralcircuits formed by thin film transistors include a vertical driver (13)for sequentially selecting pixels of said pixel unit in row units and ahorizontal driver (14) for writing pixel signals in the pixels selectedin row units by the vertical driver.
 13. An electronic device as setforth in claim 11, wherein said peripheral circuits formed by thin filmtransistors include a vertical driver (13) for sequentially selectingpixels of said pixel unit in row units and said peripheral circuitsformed by semiconductor chips include a horizontal driver (74) forwriting pixel signals in the pixels selected in row units by thevertical driver.
 14. An electronic device as set forth in claim 12 or13, wherein said peripheral circuits formed by semiconductor chipsinclude a timing controller (23) for controlling the timing of selectionof the pixels by the vertical driver (13) and the timing for writing ofthe pixel signals to the pixels by the horizontal driver.
 15. Anelectronic device as set forth in any one of claims 12 to 14, whereinsaid peripheral circuits formed by semiconductor chips include areference voltage generator (24) for outputting a reference voltage tosaid horizontal driver.
 16. An electronic device as set forth in any oneof claims 12 to 15, wherein said peripheral circuits formed bysemiconductor chips include a DC-DC converter (25) for generating atleast two types of voltages higher than an input voltage and givingpower to at least the vertical driver and the horizontal driver.
 17. Anelectronic device as set forth in any one of claims 11 to 16, whereinthe semiconductor chips are mounted on the first substrate by a COGmethod so that at least part of the semiconductor chips overlap regionsof said peripheral circuits formed by thin film transistors.
 18. Anelectronic device as set forth in claim 17, wherein connection parts forconnecting the semiconductor chips by the COG method are formed atperipheral parts of said peripheral circuits formed by thin filmtransistors.
 19. An electronic device as set forth in any one of claims11 to 18, wherein as said peripheral circuits, the part of theperipheral circuits driven at a low speed are formed by thin filmtransistors, while the peripheral circuits driven at a higher speed thanthat part of the peripheral circuits are formed by semiconductor chips.20. An electronic device as set forth in any one of claims 11 to 19,wherein a thickness of the semiconductor chips is smaller than acombined thickness of said liquid crystal composition on said firstsubstrate and said second substrate.